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Issue DateTitleAuthor(s)
2012A novel design technique for effective SCE control in nano-scaled devices using a buried metalGupta, Partha Sarathi; Kanungo, Sayan; Rahaman, Hafizur; Dasgupta, Partha Sarathi
2012Modeling the channel potential and threshold voltage of a fully depleted Double Gate Junctionless FETGupta, Partha Sarathi; Burman, Debasree; Das, Jayita; Brahma, Madhuchhanda; Rahaman, Hafizur; Dasgupta, Partha Sarathi
2012A simple analytical model of silicon on insulator tunnel FETKanungo, Sayan; Rahaman, Hafizur; Gupta, Partha Sarathi; Dasgupta, Partha Sarathi
2012Simulation study of an ultra thin body silicon on insulator tunnel field effect transistorGupta, Partha Sarathi; Kanungo, Sayan; Rahaman, Hafizur; Dasgupta, Partha Sarathi
2012Analysis and study of different parameters affecting the I-V characteristics of tunnel-FET transistorGupta, Partha Sarathi; Rahaman, Hafizur; Kanungo, Sayan; Dasgupta, Partha Sarathi
2012Performance analysis and simulation study of a Sandwiched Barrier Tunnel FETGupta, Partha Sarathi; Burman, Debasree; Das, Jayita; Brahma, Madhuchhanda; Rahaman, Hafizur; Dasgupta, Partha Sarathi
2012A detail simulation study on Extended Source Ultra-Thin Body Double-Gated Tunnel FETKanungo, Sayan; Rahaman, Hafizur; Gupta, Partha Sarathi; Dasgupta, Partha Sarathi
2012Analytical study of the effect of asymmetric gate bias on the performance of double gate TFETGupta, Partha Sarathi; Jayita; Brahma; Burman, Debasree; Das, Madhuchhanda; Rahaman, Hafizur; Dasgupta, Partha Sarathi

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