Please use this identifier to cite or link to this item: https://ir.iimcal.ac.in:8443/jspui/handle/123456789/1580
Title: Arithmetic algorithms for ternary number system
Authors: Das, Subrata
Dasgupta, Partha Sarathi
Sensarma, Samar
Keywords: 3-valued logic
Arithmetic algorithms
Ternary number
Trit
VLSI
Issue Date: 2012
Publisher: SCOPUS
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Series/Report no.: 7373 LNCS
Abstract: The use of multi-valued logic in VLSI circuits can reduce the chip area significantly. Moreover, there are several additional advantages of using multi-valued logic in VLSI over the conventional Binary logic, such as energy efficiency, cost-effectiveness and so on. It has been shown that Base-3 number system is nearly optimal for computation. In this paper we have studied some existing logical operation on ternary number system. We have also discussed some of the existing arithmetic operations using ternary number system. Some new algorithms for arithmetic operations have also been proposed, and shown to be quite efficient in time complexity. © 2012 Springer-Verlag.
Description: Das, Subrata, Department of Computer Science and Engineering, University of Calcutta, India; Dasgupta, Partha Sarathi Management Information Systems Group, Indian Institute of Management Calcutta, India; Sensarma, Samar, Department of Computer Science and Engineering, University of Calcutta, India
ISSN/ISBN - 03029743
pp.111-120
DOI - 10.1007/978-3-642-31494-0_13
URI: https://www.scopus.com/inward/record.uri?eid=2-s2.0-84864295687&doi=10.1007%2f978-3-642-31494-0_13&partnerID=40&md5=607e97d2a18b64b2aac36211516768f8
https://ir.iimcal.ac.in:8443/jspui/handle/123456789/1580
Appears in Collections:Management Information Systems

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