Please use this identifier to cite or link to this item: https://ir.iimcal.ac.in:8443/jspui/handle/123456789/1568
Title: Analytical study of the effect of asymmetric gate bias on the performance of double gate TFET
Authors: Gupta, Partha Sarathi
Jayita
Brahma
Burman, Debasree
Das, Madhuchhanda
Rahaman, Hafizur
Dasgupta, Partha Sarathi
Keywords: EHBTFET
Subthreshold swing
TFET
Transfer characteristics
Issue Date: 2012
Publisher: SCOPUS
Proceedings of the 2012 International Conference on Communications, Devices and Intelligent Systems, CODIS 2012
Abstract: In this paper we have investigated the effect of asymmetric gate bias on the performance of a double gated TFET structure. We have carried out an extensive simulation study on a recently reported novel electron hole bilayer TFET structure. The structure exhibits a high on current in the range of 50 ?A/?m and the off current remains as low as 10-15 Ampere/?m. So a Ion/Ioff ratio of 10P10 can be achieved. Subthreshold swing has also been reduced to a value of 18mV/decade. The device principle and performance are investigated by 2D numerical simulation. © 2012 IEEE.
Description: Gupta, Partha Sarathi, Bengal Engineering and Science University, Shibpur, Howrah, India; Burman, Debasree, Bengal Engineering and Science University, Shibpur, Howrah, India; Das, Jayita, Bengal Engineering and Science University, Shibpur, Howrah, India; Brahma, Madhuchhanda, Bengal Engineering and Science University, Shibpur, Howrah, India; Rahaman, Hafizur, Bengal Engineering and Science University, Shibpur, Howrah, India; Dasgupta, Partha Sarathi, Indian Institute of Management, Calcutta, India
ISSN/ISBN - 978-146734698-6
pp.145-148
DOI - 10.1109/CODIS.2012.6422157
URI: https://www.scopus.com/inward/record.uri?eid=2-s2.0-84874413924&doi=10.1109%2fCODIS.2012.6422157&partnerID=40&md5=024f21526526176705176ea580f7f63a
https://ir.iimcal.ac.in:8443/jspui/handle/123456789/1568
Appears in Collections:Management Information Systems

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